C6678 Evm

Posted By admin On 27/11/21


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TI TMS320C6678 EVM Board Project Code: PCB Rev. A104-1 PCB PN: PCB Thickness: 62 mils(1.6mm) 12 Layers DISCLAIMER: THIS CIRCUIT DESIGN IS.

  1. The TMS320C6678 is a lite evaluation modules (EVM), easy to use, cost efficient development tools that help developers quickly get started with designs using the C6678 or C6674 or C6672 multicore DSP.
  2. The TMS320C6678 Lite Evaluation Modules (EVM), are easy-to-use, cost-efficient development tools that help developers quickly get started with designs using the C6678 or C6674 or C6672 multicore DSP. The EVMs include an on-board, single C6678 processor with robust connectivity options that allows customers to use this AMC form factor card in.
  3. The TMDSEVM6678L Evaluation Modules (EVM) is an easy-to-use, cost-efficient development tool that helps developers quickly get started with designs using the C6678, C6674, or C6672 multicore DSP.
  • 1Tutorial 7: Using UIA and System Analyzer with OpenMP projects

Tutorial 7: Using UIA and System Analyzer with OpenMP projects[edit]

UNDER CONSTRUCTION!

Background Info[edit]

References

  • OpenMP on the C6000: http://processors.wiki.ti.com/index.php/OpenMP_on_C6000
  • SMP wiki: http://processors.wiki.ti.com/index.php/SMP_Debug

OpenMP program code is typically constructed as a single image that is loaded into shared memory and executed by all cores, with each core maintaining its own state in its own local memory. For the Keystone Architecture devices (e.g. the C6678), the program code is typically loaded into the MSMC (multicore shared memory controller) SRAM and the local data is stored in L2SRAM.


An OpenMP Example Project[edit]

Prerequisites (tested configuration)

  • C6000 Compiler v7.4.0 (MUST be this version - 7.4.1 and 7.4.2 do not work! See [this E2E post] for more info
  • UIA 1.2.1.8_eng or later
  • C6678 EVM
  • CCSv5.2.1 or later (click here to download CCS)
  • Packages that ship with MCSDK 2.1.2
C6678 Evm
  • XDC 3.23.4.60
  • IPC 1.24.3.32
  • OMP 1.1.3.2
  • Sys/BIOS 6.33.6.50
  • MCSDK PDK TMS320C6678 1.1.2.5

Building the project

  • Unzip the attached project File:OpenMP with UIA Example C6678 8cores.zip into a folder and import it into CCS (File /Import), copying it into your workspace.
  • Ensure that the project is configured for Release mode
  • in the Project Explorer view, right click on the project and select Build Configurations / Set Active / Release)
  • Configure the build settings
  • In the Project Explorer view, right click on the project and select 'Show Build Settings...'.
  • Click on General in the left pane, and ensure that the compiler version is TI v7.4.0
  • Click on the RTSC tab and ensure that you have the correct XDC version, the correct package versions selected and the correct Platform selected (e.g. ti.omp.examples.platforms.evm6678)
  • Click OK to close the Build Options dialog
  • Build the project.

Launching the Project[edit]

The basic approach to launching this type of program is to

  • load the program into core 0 (the master core)
  • load symbols into all other cores (the slave cores) and restart the cpus (so that the PC is at c_int00)
  • run to main on core 0. This will initialize the shared memory region used for IPC with all other cores. Core 0 will then wait for all of the other cores to start up.
  • run all of the other cores. When core 0 detects that all cores are running, it will hit main and stop.
  • manually halt all the other cores
  • Start System Analyzer->Live to capture events
  • run CPU 0 and then the other cores

When working with this type of program in CCS, it is important to avoid the use of software breakpoints. The way that software breakpoints work is that a special ‘software breakpoint’ opcode is written into memory by CCS and, when the CPU executes this breakpoint opcode, the debugger is notified. The debugger then replaces the breakpoint opcode with the original program opcode that was located at that address and updates the Debug View. If your program is located in shared memory, this causes problems. The debugger will restore the original opcode when the first CPU hits the breakpoint, so all of the other CPUs will not see the breakpoint at all.

Target Configuration

CPU 0 (and only CPU 0) should be configured to run the EVM board's gel file as the initialization script. To configure this:

  • Open the Target Configuration view (Views / Target Configurations)
  • Open your evm board's .ccxml file in the editor by double-clicking on it in the target configuration view
  • Open the Advanced tab
  • Expand the tree so that C66xx_0 is selected
  • Click on the Browse button to the right of the initialization script text box
  • Browse to the gel file for your EVM board
  • e.g. for the C6678 EVM, browse to ccsv5ccs_baseemulationboardsevmc6678lgel in your CCS install folder and select the evmc6678l.gel file

For the Slave cores (CPU 1-7)

  • Download the attached File:Clear stale state.zip file and unzip the gel file it contains into e.g. c:ti or some other convenient folder.
  • In the .ccxml file editor's advanced tab, select each of the slave cores (C66xx_1, etc.) and configure the initialization script text box with the path to the downloaded clear_stale_state.gel file.

Save the file (File / Save)


Launch Configuration

Many of the steps required to launch an OpenMP project can be automated by creating a custom launch configuration. For instructions on how to configure the launch in the version of CCS that you are using, please click on the appropriate link below:

At this point, you should have the program loaded and running, and System Analyzer should be collecting events.

Events should be displayed in the System Analyzer Live Session: Logs view. If the warning 'Warning: Waiting UIA SyncPoint data' is always displayed in the Live Session: Logs view status bar, you can skip the sync points by right clicking on the view and selecting Live Session / Skip Sync Points for Correlation.

  • Once the program has finished the OpenMP program code, one of the last events you should see displayed in the Live Session Logs view should be an event that has a message text of 'Stop:OMP PARALLEL FOR, using 8 cores'
  • To see a table comparing the processing times for the parallel sections in the program, in the Live Session: Logs view toolbar click on the word 'Analyze' and select Duration. The Duration Configuration dialog box will be displayed - click Start. In the Duration view, click on the AutoFit Columns button . You should see a table that looks something like the one below:


IMPORTANT

  • Once you have run the program, the safest way to reload it is to terminate the current debug session and to re-launch it. There are a number of bugs in CCSv5.3 relating to the way groups behave and to the use of real-time mode to upload events that can cause problems, and terminating the session avoids these. (These bugs have been fixed in CCSv5.4).

Links[edit]

{{
  1. switchcategory:MultiCore=
  • For technical support on MultiCore devices, please post your questions in the C6000 MultiCore Forum
  • For questions related to the BIOS MultiCore SDK (MCSDK), please use the BIOS Forum

Please post only comments related to the article SystemAnalyzerTutorial7 here.

Keystone=
  • For technical support on MultiCore devices, please post your questions in the C6000 MultiCore Forum
  • For questions related to the BIOS MultiCore SDK (MCSDK), please use the BIOS Forum

Please post only comments related to the article SystemAnalyzerTutorial7 here.

C2000=For technical support on the C2000 please post your questions on The C2000 Forum. Please post only comments about the article SystemAnalyzerTutorial7 here.DaVinci=For technical support on DaVincoplease post your questions on The DaVinci Forum. Please post only comments about the article SystemAnalyzerTutorial7 here.MSP430=For technical support on MSP430 please post your questions on The MSP430 Forum. Please post only comments about the article SystemAnalyzerTutorial7 here.OMAP35x=For technical support on OMAP please post your questions on The OMAP Forum. Please post only comments about the article SystemAnalyzerTutorial7 here.OMAPL1=For technical support on OMAP please post your questions on The OMAP Forum. Please post only comments about the article SystemAnalyzerTutorial7 here.MAVRK=For technical support on MAVRK please post your questions on The MAVRK Toolbox Forum. Please post only comments about the article SystemAnalyzerTutorial7 here.For technical support please post your questions at http://e2e.ti.com. Please post only comments about the article SystemAnalyzerTutorial7 here.

}}

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Retrieved from 'https://processors.wiki.ti.com/index.php?title=SystemAnalyzerTutorial7&oldid=136268'

Build date: 04202020


Release Information


Thank you for your interest in the C667x Processor Software Development Kit (SDK) for a real-time operating system (RTOS). This software accelerates application development schedules by eliminating the need to create basic system software functions from scratch.
The SDK includes a real-time multitasking kernel, network communications support, examples, and drivers. The exact content of the SDK depends on the capabilities of the device, but all devices share common APIs and build on existing proven software components to ensure reliability and quality. The software components are fully tested to ensure that they work together with TI’s Code Composer Studio integrated development environment.
C6678 mdio initSupported Platforms
PlatformSupported DevicesSupported EVMs
C667xC6678, C6674, C6672, C6671C667x EVM (TMDSEVM6678)

More Information

C6678 Example


If you’d like more information on all of these choices, please refer to the Processor RTOS SDK Getting Started Guide. For a complete overview of the SDK, please refer to the Processor RTOS SDK Software Developer Guide.

PROCESSOR-SDK-RTOS-C667x Product downloads

TitleDescriptionSize
C667x RTOS SDK Essentials
ti-processor-sdk-rtos-c667x-evm-06.03.00.106-Windows-x86-Install.exeC667x RTOS SDK installer for Windows Host844552K
ti-processor-sdk-rtos-c667x-evm-06.03.00.106-Linux-x86-Install.binC667x RTOS SDK installer for Linux Host846488K
CCS9.3.0.00012_win64.zipCode Composer Studio IDE for Windows Host
CCS9.3.0.00012_linux-x64.tar.gzCode Composer Studio IDE for Linux Host
C667x RTOS SDK Optional Addons
Related SoftwareAdditional software elements not included in SDK
C667x RTOS SDK Documentation
Processor SDK RTOS Release NotesLink to Release Notes for Processor SDK RTOS
Processor SDK RTOS Getting Started GuideLink to Getting Started Guide for Processor SDK RTOS
Processor SDK RTOS Developer GuideLink to Developer Guide for Processor SDK RTOS
Software Manifest Software Manifest of Components Inside the SDK256K
C667x EVM Documentation
C667x EVM Quick Start GuideQuick Start Guide that was included in the EVM kit
Previous Release
Processor-SDK-RTOS-C667x 06.01.00.08Link to previous release download page
C667x RTOS SDK Checksums
md5sum.txtMD5 Checksums4K
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